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From: grc@stl.stc.co.uk (Gary Cook)
Newsgroups: sci.electronics
Subject: Re: Advice needed on wire-wrapping CPU based circuits
Keywords: wire-wrap advice needed
Message-ID: <3344@stl.stc.co.uk>
Date: 3 Sep 90 08:40:42 GMT
References: <409@horizon.COM>
Sender: news@stl.stc.co.uk
Reply-To: grc@larch.UUCP (Gary Cook)
Organization: STC Technology Limited, London Road, Harlow, Essex, UK
Lines: 57

In article <409@horizon.COM> kevin@horizon.COM (Kevin Criqui) writes:
>
>I'm in the process of prototyping a small computer with a MC68000, some
>EPROM, a duart and (hopefully), 8 megs of DRAM.  I've wire-wrapped the
>circuit on a piece of perf board.  In trying to get the DRAM controller
>working, I found that the 8 MHz system clock is quite noisy.  In fact,
>if I look closely on the scope, I can see an occasional pulse of 2-2.5
>volts during the time when the clock should be low.  The logic analyzer
>confirms this, showing occasional glitches on the clock line.  I'm
>fairly certain these glitches are causing the troubles I'm having with
>the DRAM controller (a National Semiconductor 8421A).
>
>I've tried beefing up the power and gound lines and have made sure
>there are 0.1 uF bypass caps on all the chips with almost no luck.
>Does anyone out there have any advice for me?  If you've successfully
>wire wrapped a CPU based circuit that ran at 8 MHz (or higher), I'd
>like to hear how you did it.
>
>	_kevin
>
>   |  Kevin Criqui                           kevin@horizon.com  |
>   |  Science Horizons, Inc.           ...hp-sdd!horizon!kevin  | 
>   |  710 Encinitas Blvd. #200               (619)942-7333 (w)  |
>   |  Encinitas, CA  92024                   (619)942-1652 FAX  |


I have had experience with 12.5 Mhz wire-wrapped circuits. The clock line
was badly distorted and did cause problems. We had to use seperate twisted
ground-signal pair runs for the clock, and in some cases try to terminate
the end of the run to prevent reflections.

We also had to seperate the clocks driving TTL from those driving the EPLDs, 
as the EPLDs tend to mess up the clock.

Our technicians wire-wrap in neat busses, wrapping around the edges of chips
etc., this makes for pretty wire-wrapping but I think to avoid cross-talk 
effects a rats-nest approach would be better (ie point-point taking shortest
route.)

Luckily we have converted all of out boards now to PCB, and I don't think 
we'll use wire-wrap again.

Good luck with your debugging.

GRC. 
 



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