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From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr)
Newsgroups: comp.arch
Subject: Re: Workstation Data Integrity
Message-ID: <2497@crdos1.crd.ge.COM>
Date: 6 Sep 90 19:45:30 GMT
References: <6797.26d6edce@vax1.tcd.ie> <56qmo1w162w@zl2tnm.gp.govt.nz> <19875@crg5.UUCP> <19208@dime.cs.umass.edu> <3405@awdprime.UUCP>
Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen)
Organization: GE Corp R&D Center, Schenectady NY
Lines: 21

In article <3405@awdprime.UUCP> tif@doorstop.austin.ibm.com (Paul Chamberlain/32767) writes:

| I do not pretend to answer the original question but only to say that
| this answer is unfounded.  According to my statistics class this is only
| true if the two events are independent.  Perhaps the question could have
| been read as:

  There are exceptions to every assumption, but assuming that most
memory systems are based on 1 bit wide chips, alpha strikes (which seem
to be the common cause of bit errors) would be limited to one bit in a
word. I think the answer is that multibit errors in a word are rare.

  My hardware guru says that one particle should only hit one bit, even
in the same chip, and that depending on the chip it can only make one
state transition. That means on some chips it can change 0 to 1, but not
back. The alpha hit discharges the capacitor in the cell.

  Sounds right to me, but I don't claim to be a hardware type.
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
    VMS is a text-only adventure game. If you win you can use unix.