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From: davec@neutron.amd.com (Dave Christie)
Newsgroups: comp.arch
Subject: Re: Workstation Data Integrity
Message-ID: <1990Sep8.014608.27533@mozart.amd.com>
Date: 8 Sep 90 01:46:08 GMT
References: <6797.26d6edce@vax1.tcd.ie> <56qmo1w162w@zl2tnm.gp.govt.nz> <19875@crg5.UUCP> <19208@dime.cs.umass.edu> <1990Sep6.141040.3244@mozart.amd.com> <2496@crdos1.crd.ge.COM>
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Reply-To: davec@nucleus.amd.com (Dave Christie)
Organization: Advanced Micro Devices, Inc., Austin, Texas
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In article <2496@crdos1.crd.ge.COM> davidsen@crdos1.crd.ge.com (bill davidsen) writes:
>In article <1990Sep6.141040.3244@mozart.amd.com> I write:
>
>| Its been many years since I designed EDAC for a 64-bit machine, but what
>| I seem to remember is that using 7 bits would only allow you to correct
>| the 64-bit data portion, not the 7 check bits themselves.  To cover those
>| you need one more bit (and you really do want those covered as well). 
>
>  I just looked at some C code for Hamming code I wrote years ago, and
>it appears to need log2(N)+1 bits, including the EDAC bits themselves.

I stand corrected (thank you Robert Herndon) - the eighth bit gives
you double error detection.  (I knew it was necessary for some reason
- like I said, its been a looong time...)  The system I did was SECDED,
which is the only EDAC scheme I've ever seen implemented, but then, I've
only worked on mainframes.  For a more cost sensitive workstation you
may well skip the double-error stuff, but if it's only one more bit
on top of 71, what the hell - it's good fodder for the sales brochures
if nothing else.
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Dave Christie		My opinions only.