Path: utzoo!attcan!utgpu!news-server.csri.toronto.edu!mailrus!uwm.edu!cs.utexas.edu!swrinde!mips!apple!amdcad!brahms!ching From: ching@brahms.amd.com (Mike Ching) Newsgroups: comp.arch Subject: Re: Workstation Data Integrity Message-ID: <1990Sep8.172848.4600@amd.com> Date: 8 Sep 90 17:28:48 GMT References: <2496@crdos1.crd.ge.COM> <1990Sep8.014608.27533@mozart.amd.com> Sender: usenet@amd.com (NNTP Posting) Organization: Advanced Micro Devices; Sunnyvale, CA Lines: 22 In article daveg@near.cs.caltech.edu (Dave Gillespie) writes: >>>>>> On 8 Sep 90 01:46:08 GMT, davec@neutron.amd.com (Dave Christie) said: > >> The eighth bit gives you double error detection... >> ... if it's only one more bit on top of 71, what the hell... > >I wonder, I can see single-bit errors occurring in isolation, but >how likely is it to have an exactly two-bit error? Most catastrophes >I can think of will nuke one bit or many. The problem is that the two errors don't have to occur simultaneously. If a soft error is not corrected (by accessing the word and writing a corrected word back), a second bit can be corrupted at a later time and result in a double bit error when the word is accessed. This is why scrubbing was incorporated in DRAM controllers. Scrubbing is a term coined for doing a RMW cycle with correction during a refresh cycle. All words in memory get accessed (and corrected if necessary) every few minutes instead of when accessed by a program. An added benefit is that errors are corrected in the background instead of imposing a correction cycle on an access when the processor is waiting for the data. Mike Ching