Path: utzoo!censor!geac!torsqnt!news-server.csri.toronto.edu!clyde.concordia.ca!uunet!wuarchive!julius.cs.uiuc.edu!apple!coherent!next!bbeckwit From: bbeckwit@next.com (Bob Beckwith) Newsgroups: comp.arch Subject: Re: 64 bits--why stop there? Message-ID: <235@next.com> Date: 10 Sep 90 00:34:20 GMT References: <6106@vanuata.cs.glasgow.ac.uk> <2437@crdos1.crd.ge.COM> <1990Aug31.174957.9612@cimage.com> <3656@goanna.cs.rmit.oz.au> Organization: NeXT Inc., Palo Alto Lines: 47 In article <3656@goanna.cs.rmit.oz.au> ok@goanna.cs.rmit.oz.au (Richard A. O'Keefe) writes: >In article <1990Aug31.174957.9612@cimage.com>, paulh@cimage.com (Paul Haas/1000000) writes: >> I used to use PR1ME 50 series processors from about 1979 to about >> 1985. They had many pointer formats, including a bit pointer. It was >> not supported by any of their compilers except as a character pointer. > >Forget the *compilers*. The point was that bit pointers weren't >supported by the *hardware*. The 3-word pointer format had a 4-bit >"bit number within word" field, but there were no instructions to >fetch or store bits, and there were no instructions to do arithmetic >on these pointers in bit units (you _could_ fetch and store characters >and adjust by characters). > >Then there were fun things like this: you could only fetch and store >characters through these pointers when they were in certain special >registers, and one of those registers overlapped the double-precision >floating-point register. (I wondered for a long time how they managed >to fit 67 bits of pointer into a 64-bit register until it dawned on me >that they dropped the 3 bit-within-byte bits.) > >The main point of character pointers in the 50 series was to support >COBOL editing. --------------------- Well... you're almost correct. ALFA (Add L to Field Address Register in Vmode) & ARFA (it's Imode equivalent) will adjust the Field Address Registers by bits. So, there are indeed instructions that perform arithmetic on the pointers in bit units. In addition, PCL argument templates (APs) will address to the bit level. Also, the field address registers are 36 bits in length. The field length registers are 21 bits in length. 36+21 = 57 (not 67). That means there were 7 bits left over (instead of 3 too many). Cobol uses bit pointers to support decimal arithmetic which requires addressing to the nibble for "packed" data (i.e. BCD). Arithmetic can be performed on upto 64 (ASCII or BCD) digits. The PL/1 (style) compilers use the field address registers to support operations on the "bit" data type. Finally, when the Prime 400 was being designed (back around 1975), there were a set of bit operations defined. These were never implemented due to lack of space in the control store and the fact that these operation could be performed in software at roughly the same speed. As an aside, it's somewhat funny that you mentioned "Hardware First", since most of these operations (instructions) were defined by the compiler and OS folks. In fact, one of Prime's marketing slogans used to be "Software First". --------------------- Bob_Beckwith@NeXT.COM 900 Chesapeake Drive Redwood City, CA 94063