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From: bdg@tetons.UUCP (Blaine Gaither)
Newsgroups: comp.arch
Subject: Re: 64 bits--why stop there?
Message-ID: <8599@tetons.UUCP>
Date: 10 Sep 90 17:53:06 GMT
References: <6106@vanuata.cs.glasgow.ac.uk> <2437@crdos1.crd.ge.COM> <1990Aug31.174957.9612@cimage.com> <3656@goanna.cs.rmit.oz.au> <1990Sep2.220249.19420@cimage.com> <5063@daffy.cs.wisc.edu>
Organization: Amdahl Corp., Rexburg, ID
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In-reply-to: bmiller@rt2.cs.wisc.edu's message of 6 Sep 90 18:24:09 GMT

>    Just off hand, would any of you familiar with past
>Burroughs machines care to provide some info on how they
>dealt with bit-oriented data?

In the 1986 time frame (when Burroughs found a pill, swallowed it and
became UNISYS).  Burroughs had 5 main types of systems in the field.

1:  B80/90 Based systems - 
    These were essentially a home grown 8 bit minicomputer
    to compete with 80** systems.  I am not very familiar with these.  But
    I don't think they were of very much academic interest.

2.  Convergent tech -  8086/286 and moto 680xx based systems
    
3.  B1700/18/1900 systems - 24 bit machines as I recall.
    These had bit addressed memories. They were designed originally
    as a multisystem emulation platforms so it was thought
    that a bit addressed memory was a plus for flexibility.  At the time of
    the development of the 1700 the other Burroughs machines were 
    digit (4 bit decimal) addressed, and 48/52 bit addressed machines.
    I don't recall that bit addresses were a big win in that environment,
    at that time.  Since most languages wanted 8 bit addressability, wasting
    3 of 24 address bits is a problem.
    Cobol, Fortran, and Pascal provide little opportunity to
    exploit bit addressing.  The bigest win was probably the ability to address
    4 bit decimal quantities in COBOL.

3.  The B2500-4900 -> PSeries?  This was a decimal addressed memory to memory 
    cobol machine with a very elegant simple instruction set.  
    The decimal addressing was neither a big win nor loss.

The above two machines really became outmoded not because they were
CISC but because of the advent of cache memories, and good optimizing
compilers on medium scale computers.  When there was a huge difference
between the clock rate at which you could run a CPU and the speed of
memory, the impact of multicycle instructions was minimal.

4) B5000-B7900 -> A1-A19?  These are essentially the old stack
machines.  They use a 48 bit word with 4 additional tag bits that
determined the type of the operand.  The machines have a word addressed
memory with 8 six-bit characters /word or 6 - eight-bit characters.
Handling words with non power-of-two number of characters is a disaster
which can only be overcome with lots of hardware.  As far as tagged
memories are concerned, I love the idea of it, but there should still
be separate operator for integer, rational and double.  I would
rather trap if the type of the data I was fetching was guessed wrong,
then not know what FUs to reserve, or how long the operand was.  The
addressing of these machines is in 6MB segments.  I think they allow
each program to have at least 1M segments.  Because all indexed
memory operations took several ops to form a SIRW (stuffed indirect
reference word) descriptor on the top of the stack before loading, addressing 
arrays was painfully slow.

The architectural lessons to learn from Burroughs are:

You loose if:
 
1) Religion takes over
2) A project is "secret"
3) You depend on the advance of technology to improve your system design
   as opposed to evolution of instruction sets and architecture.
4) A general purpose machine is optimized for one language at the expense 
   of all others.

My Opinions not ACs