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From: mullen@sj.ate.slb.com (Lew Mullen)
Newsgroups: comp.lang.c
Subject: Re: C + Make
Message-ID: <1990Sep11.165709.24875@sj.ate.slb.com>
Date: 11 Sep 90 16:57:09 GMT
References: <BEVAN.90Sep10220041@rhino.cs.man.ac.uk>
Reply-To: mullen@sj.ate.slb.com (Lew Mullen)
Organization: Schlumberger ATE, San Jose
Lines: 76

In article <BEVAN.90Sep10220041@rhino.cs.man.ac.uk> bevan@cs.man.ac.uk (Stephen J Bevan) writes:
>If you have .h files that include other .h files ...
>
>foo.o:	foo.c foo.h a.h b.h ... any file that a.h/b.h includes
>i.e. you have to flatten the hierarchy you have built up.
>
>2. If its an ok idea, has somebody got a solution that will update all
>   the dependencies with just one run of `make'.
>
>Stephen J. Bevan	bevan@cs.man.ac.uk


There are several "dependency makers" on the net.  They are
based on a feature of make, that a target may have more than one
dependency line, but only one may have commands with it .. i.e.:

	foo.o:	foo.c
	foo.o:	foo.h
	foo.o:	a.h
	foo.o:	b.h

	foo.o:	;
		cc foo.c -g foo.o


Since this is *exactly* what /usr/lib/cpp -M outputs,
it makes it possible to create a self-editing Makefile,
which updates it's own dependency "section".

Here is an example: (this is mine, not from the net)

SRC=foo.c

########################################################################
####################  automatic dependency making  #####################
########################################################################

MAKEFILE=Makefile

dependencies:	$(SRC) $(MAKEFILE)
	@echo " ";echo make $@ - newer files are: $? ;echo " "
	@rm -rf /tmp/a /tmp/$(MAKEFILE)
	echo "###automatic dependencies only below this line###" > /tmp/a
	(for i in $(SRC);do echo " ";/usr/lib/cpp -M $(CPPFLAGS) $$i;done)>>/tmp/a
	sed -e '/^###automatic/,$$d' < $(MAKEFILE)  > /tmp/$(MAKEFILE)
	sed -e 's/:/ dependencies:/' < /tmp/a >> /tmp/$(MAKEFILE)
	chmod -f 644 $(MAKEFILE).old ; cp $(MAKEFILE) $(MAKEFILE).old
	@if ( cmp /tmp/$(MAKEFILE) $(MAKEFILE) 1>/dev/null 2>&1 ) ; then \
	  echo "no changes to $(MAKEFILE)" ; \
	else \
	  set -x ; mv /tmp/$(MAKEFILE) $(MAKEFILE) ; \
	fi
	@if ( cmp /tmp/a ./dependencies 1>/dev/null 2>&1 ) ; then \
	  echo "no changes to $@" ; \
	  touch dependencies ; \
	else \
	  set -x ; \
	  if [ -f dependencies ] ; then diff dependencies /tmp/a ; fi ;\
	  mv /tmp/a ./dependencies ; \
	fi
	@cmp $(MAKEFILE) $(MAKEFILE).old 1>/dev/null 2>&1 || exit 4
#
# these prerequisites were generated by using the
# -M option to the C preprocessor (cpp), which is
# designed to do this.
# Example dependencies: '/usr/lib/cpp -M foo.c'
#
# To recreate it, delete the file 'dependencies'
# and type 'make dependencies' ... this will delete
# the remainder of this file and replace it.
#
###automatic dependencies only below this line###
 
foo.o:	foo.c
foo.o:	/usr/include/stdio.h
foo.o:	foo.h