Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!munnari.oz.au!brolga!bunyip!iceman!cpca
From: cpca@iceman.jcu.oz (C Adams)
Newsgroups: comp.sys.amiga
Subject: Re: Low cost Macs and The Return of Timex (was Re: Murph's VAPORWARE )
Summary: I don't believe it.....
Message-ID: <940@iceman.jcu.oz>
Date: 7 Sep 90 01:29:48 GMT
References: <9008270223.AA07322@lilac.berkeley.edu> <2788@corpane.UUCP> <4393@grape3.UUCP>
Organization: JCUNQ, Townsville, Qld, Australia
Lines: 27

In article <4393@grape3.UUCP>, king@motcid.UUCP (Steven King) writes:
> I'd buy 200 MIPS for this thing.  Don't forget, MIPS (Million Instructions
> Per Second) is not an indication of processor power!  It's an indication of,
> quite literally, the speed at which a processor executes instructions.  RISC
> chips by their very nature execute instructions very quickly; that's what
> they're designed to do.  On the downside, you've gotta execute a LOT of
> instructions to get anything done.  It's a trade-off.  Which is better, the
> ability to execute instructions quickly but needing a lot of them to do
> anything, or executing instructions slowly and having a single instruction
> wax your car and walk your dog?  Ah, the heart of the RISC vs. CISC debate!
> 

Well I don't believe it is possible.  Reading this article gives the
impression that the machine is micro-coded, and that makes it all seem
even less likely.  Even Cray's aren't really quick unless running in
vector mode.  The rate of instruction fetch would have to be very high
to get 200 million ops per second, let alone execute them.

There are all sorts of problems like memory speeds, pipeline breaks etc.
I think this is a joke and if you posted it to comp.arch it would probably
been treated as such.

followups to comp.arch please....

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Colin Adams     Life's funny but I don't laugh
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