Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!cbmvax!daveh
From: daveh@cbmvax.commodore.com (Dave Haynie)
Newsgroups: comp.sys.m68k
Subject: Re: WANTED: info on DMAcontrollers for 680x0
Message-ID: <14265@cbmvax.commodore.com>
Date: 6 Sep 90 22:18:28 GMT
References: <1990Sep3.081020.26060@wrl.dec.com>
Reply-To: daveh@cbmvax (Dave Haynie)
Distribution: usa
Organization: Commodore, West Chester, PA
Lines: 27

In article <1990Sep3.081020.26060@wrl.dec.com> shepard@finch.pa.dec.com (Mark Shepard) writes:
>I'm curious about the tradeoffs involved in implimenting DMA.

>Are designers moving away from standard DMA chips, and instead designing
>custom DMA logic into ASICs for each system?  Can anyone describe the
>DMA architecture of pc systems such as the Mac (or MacII) and Amiga, and
>high-end workstations such as Apollo and HP?

In the Amiga 3000, which is the only Amiga with full 32 bit DMA, it made a
considerable amout of sense for us to do our own 32 bit wide DMA controller,
even if there were off the shelf alternatives.  The DMA functions are actually
split between two custom chips, the DMAC and the DRAM controller (RAMSEY).
The DMAC communicates with the SCSI chip and provides a FIFO, 32 bit data
path, and the primary DMA control functions.  The RAMSEY chip is a custom DRAM
controller which normally manages 16 Megsbytes of memory.  Since it needed 
most of the system address lines anyway to manage this memory, it gets them
all, and provides the 32 bit address for the DMA controller during DMA
transfers.  This allowed us to save costs by keeping both chips to 84 pins
each, yet since it's a full speed 32 bit non-muliplexed 68030 bus master, 
it's fast.

>Mark Shepard  shepard@{decpa.pa,gatekeeper}.dec.com

-- 
Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests"
   {uunet|pyramid|rutgers}!cbmvax!daveh      PLINK: hazy     BIX: hazy
      Get that coffee outta my face, put a Margarita in its place!