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From: mark@mips.COM (Mark G. Johnson)
Newsgroups: comp.sys.sgi
Subject: Re: Benchmarking the SGI: Floating point faster than integer?
Keywords: Benchmark floating integer sgi fortran FLOPS
Message-ID: <41421@mips.mips.COM>
Date: 11 Sep 90 22:17:36 GMT
References: <1464@ruunsa.fys.ruu.nl> <69040@sgi.sgi.com>
Sender: news@mips.COM
Reply-To: mark@mips.COM (Mark G. Johnson)
Organization: MIPS Computer Systems, Inc.
Lines: 32

In article <69040@sgi.sgi.com> bron@bronze.wpd.sgi.com (Bron Campbell Nelson) writes:
   >
   >The explaination  is simple: on the MIPS R2000 and R3000 cpus, floating
   >point multiplication *IS* about twice as fast as integer multiplication
   >(actually, a bit more than twice as fast).  The ratio for division is
   >even greater.
   >

Here are the cycle counts for R20x0 / R30x0 ; note that Nelson's remark
above is a little inaccurate -- the integer/FP cycle ratio is greatest
for multiply, not divide.
            integer multiply:        12 cycles
            integer divide:          34 cycles
            IEEE 32b FP multiply:     4 cycles
            IEEE 32b FP divide:      12 cycles
            IEEE 64b FP multiply:     5 cycles
            IEEE 64b FP divide:      19 cycles

  >My understanding is that MIPS decided to throw a lot of silicon at the
  >floating point problem, while they found that the majority of integer ...

A misconception, actually.  The FP multiplier has 9,064 transistors total:
8,302 transistors in the (regular layout structure) Datapath, and 762 in the
control logic (Booth encoders, etc).  The entire FP chip only contains
76,451 transistors total... thus the FP multiplier is 11.9% of the total.
Especially today in the era of million+ transistor CPUs, 9000 transistors
for FP multiplication can hardly be considered "lavish"; this was also
true even in Jan. 1987 when the FP chip hit first silicon.
-- 
 -- Mark Johnson	
 	MIPS Computer Systems, 930 E. Arques M/S 2-02, Sunnyvale, CA 94086
	(408) 524-8308    mark@mips.com  {or ...!decwrl!mips!mark}