Path: utzoo!attcan!uunet!pilchuck!amc-gw!quick!srg From: srg@quick.com (Spencer Garrett) Newsgroups: comp.arch Subject: importance of carry logic (was 32 x 32 -> ?? multiply) Message-ID: <1990Sep17.062626.12006@quick.com> Date: 17 Sep 90 06:26:26 GMT References: <3984@bingvaxu.cc.binghamton.edu> <41425@mips.mips.COM> Organization: Quicksilver Engineering, Seattle USA Lines: 15 In article , aglew@crhc.uiuc.edu (Andy Glew) writes: > Ie. based on my experience coding in_chksum(), but not having > coded it on a MIPS, I would estimate that the slowdown through not > having carry out and in is approximately 3-fold wrt. good code that > uses carry-out and in. But this is only an upper bound, because > overhead of call, etc., gets in the way. Actually, the upper bound on the MIPS would be a 2-fold increase. All you have to do is compute the checksum 2 bytes at a time and let all the carries accumulate in the upper half of a register. When you get to the end you fold them around to the lower half (twice!) and you're done. I can think of several strategies for improving this figure by some small increment (eg - loop unrolling is likely to be slightly more profitable given that you'll be processing twice as many data items).