Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!dino!ux1.cso.uiuc.edu!ux1.cso.uiuc.edu!aglew From: aglew@crhc.uiuc.edu (Andy Glew) Newsgroups: comp.arch Subject: Re: RISC vs. CISC? No, OS bug executing data... Message-ID: Date: 18 Sep 90 17:52:47 GMT References: <26507@mimsy.umd.edu> <3334@bnr-rsc.UUCP> <4077@auspex.auspex.com> Sender: news@ux1.cso.uiuc.edu (News) Organization: Center for Reliable and High-Performance Computing University of Illinois at Urbana Champaign Lines: 22 In-Reply-To: guy@auspex.auspex.com's message of 18 Sep 90 17:00:26 GMT >>kinda expected. Don't you think? After all, the whole point of RISC is >>to move the complexity from the chip to the S/W. But it is still a nice >>demonstration that the complexity didn't go away, just moved. > >And, perhaps, a useful demonstration as well. I remember seeing >somebody arguing against RISC because it requires people to put >complexity into software, not realizing that if you move it into >hardware it doesn't go away, it just moves.... The systems whose OS was broken will have a fix in the next OS update, maybe even a patch before that. The systems whose hardware was broken will have to wait for a new processor design, or at least a mask revision, and then they'll have to replace the socketed MPU at best, the whole board at worst. On the other hand, it might be cheaper to replace a chip than to upgrade OS... :-( -- Andy Glew, a-glew@uiuc.edu [get ph nameserver from uxc.cso.uiuc.edu:net/qi]