Path: utzoo!attcan!uunet!mcsun!ukc!inmos!brac!davidb
From: davidb@brac.inmos.co.uk (David Boreham)
Newsgroups: comp.arch
Subject: Re: MIPS R[236]000 interrupts (was Workstation Data Integrity)
Message-ID: <11275@ganymede.inmos.co.uk>
Date: 19 Sep 90 17:50:24 GMT
References: <19208@dime.cs.umass.edu> <1990Sep6.141040.3244@mozart.amd.com> <2496@crdos1.crd.ge.COM> <1990Sep7.003451.13193@portia.Stanford <2372@cirrusl.UUCP>
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Reply-To: davidb@inmos.co.uk (David Boreham)
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In article <2372@cirrusl.UUCP> douglas%cirrusl@oliveb.ATC.olivetti.com (Douglas Lee) writes:
>In <1990Sep7.003451.13193@portia.Stanford.EDU> dhinds@portia.Stanford.EDU (David Hinds) writes:
>
>>   But don't you really only need one parity bit per word, if you only
>>want to be able to detect single bit errors?  Using one parity bit
>
>But using byte parity allows you to do things like byte writes. If you
>use word parity, you must do a read modify write for every byte in
>order to update the parity of the word. This is very inefficient.
>


Interesting question: 
    Would a micro loose performance if it *NEVER* did
    byte writes ? It would certainly be an advantage to
    be able to turn them off for applications where
    EDC was used---the CPU would do the RMW cycles for
    you.
    
Also, what about EDC versions of the micros which have 
64-bit paths to memory. I don't recall seeing any 
standard 64-bit EDC chips available yet ? On the 
processors which allow bus cycle abort late in the cycle,
the error detect logic shouldn't need to be that fast
as it aught to be possible to catch an error and flush
the necessary pipelines.

Given a CPU chip which transparently implemented EDC
I'm sure that many systems would use the feature and
perhaps we could get away from all these arguments about
whether parity is worth the hassle---you would get EDC
merely by adding an extra memory chip or two.
David Boreham, INMOS Limited | mail(uk): davidb@inmos.co.uk or ukc!inmos!davidb
Bristol,  England            |     (us): uunet!inmos.com!davidb
+44 454 616616 ex 547        | Internet: davidb@inmos.com