Path: utzoo!attcan!uunet!wuarchive!psuvax1!news
From: melling@cs.psu.edu (Michael D Mellinger)
Newsgroups: comp.os.msdos.programmer
Subject: MS make is not really make??
Message-ID: <Fahn5#52@cs.psu.edu>
Date: 19 Sep 90 21:40:43 GMT
Sender: news@cs.psu.edu (Usenet)
Distribution: comp
Organization: /home/server2/melling/.organization
Lines: 24
Nntp-Posting-Host: client6.cs.psu.edu


Is it possible to set up a makefile like the one below with MS C 6.0?

OBJS = foo.o foo1.o ....

all: $(OBJS)
	$(CC) $(OBJS)

MS make doesn't seem to understand inference rules very well. I
defined one like this, but it didn't work.  Anyway, shouldn't this
already be built in?

.c.obj:
	cl /c $*.c;

Also, is anyone using GNU make?  It keeps giving me a 'separator
missing' error, or it crashes the machine.

It doesn't look like the transition from Unix to DOS is going to be
fun.  Does anyone have any suggestions on how to make this less
painful?  Do Turbo C(++) or Zortech C++ provide an environment more
like Unix?

-Mike