Path: utzoo!attcan!uunet!samsung!zaphod.mps.ohio-state.edu!swrinde!kent
From: kent@swrinde.nde.swri.edu (Kent D. Polk)
Newsgroups: comp.sys.amiga.hardware
Subject: Re: Shared Interrupts
Keywords: "not supported" interrupts
Message-ID: <28239@swrinde.nde.swri.edu>
Date: 15 Sep 90 20:31:49 GMT
References: <28208@swrinde.nde.swri.edu> <14444@cbmvax.commodore.com> <1990Sep15.011910.704@ecst.csuchico.edu>
Reply-To: kent@swrinde.UUCP (Kent D. Polk)
Organization: Southwest Research Institute, San Antonio, Texas
Lines: 26

In article <1990Sep15.011910.704@ecst.csuchico.edu> mrush@cscihp.UUCP writes:
>In article <14444@cbmvax.commodore.com> daveh@cbmvax.commodore.com (Dave Haynie) writes:
>>
>>The interrupts are level-sensitive (except for level 7, NMI, which isn't 
>>supported in the A2000).  This means that, as long as interrupts are enabled
>>(both in the Amiga interrupt controller and 680x0 sense), the 680x0 CPU will
>>sample the interrupt code every so often and dispatch the appropriate 
>>interrupt service vector as long as an interrupt is held low.
>
>	What does that mean that level 7, NMI, interrupts aren't supported in
>the A2000?  Is that to say that it is impossible for anything to assert a level
>7 interrupt, or that if anything does it will be ignored?

According to Carl Sassenrath's "Guru's Guide to the Amiga", the Amiga
Interrupt Controller is the only thing that pulls the three IPL lines
in a standard Amiga and the AIC cannot generate the NMI itself. If you
use the IPL lines directly, "the AIC, its enabling, disabling,
requesting, and prioritizing mechanisms are bypassed. This creates a
number of serious problems for most of the system software, which
relies entirely on the AIC for interrupts."

So... Any more questions? (I did my homework. Right Dave? :^)

Kent Polk: Southwest Research Institute (512) 522-2882
Internet : kent@swrinde.nde.swri.edu
UUCP     : $ {cs.utexas.edu, gatech!petro, sun!texsun}!swrinde!kent