Path: utzoo!attcan!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!samsung!zaphod.mps.ohio-state.edu!sdd.hp.com!hplabs!hpfcso!hpldola!hp-lsd!paulc From: paulc@hp-lsd.COS.HP.COM (Paul Carroll) Newsgroups: comp.sys.intel Subject: Re: Interrupt Gates on the i376 Message-ID: <7680004@hp-lsd.COS.HP.COM> Date: 14 Sep 90 20:54:22 GMT References: <6562@ncrcae.Columbia.NCR.COM> Organization: HP Logic Systems Division - ColoSpgs, CO Lines: 29 > The i486 MicroProcessor Programmer's Reference Manual (and the 386DX > manual) define the interrupt gates (starting at whatever location > + 4) as having bits 0-4 as reserved, bits 5-7 to be 000, and bits > 8-12 to be 01110 (bit 8 first). (This is on pg. 9-8 of my copy). > > The 376 Embedded Processor Programmer's Reference Manual defines the > interrupt gates (starting at whatever location > + 4) as having bits 0-4 as reserved, bits 5-7 to be 010, and bits > 8-12 to be 00110 (bit 8 first). (This is on pg. 8-7 of my copy). Just as a guess, since I haven't seen the 376 manual, but the 00110 bits should indicate an 80286-type interrupt gate while the 01110 bits are an 80386-type interrupt gate. This could be indicative of the software development environment used to create software for that processor. I don't know, but Intel may be showing a bias towards using the 80286 tool chain for producing executables for the 376. If this is not the case, then I would guess the 376 manual is hosed. As to the values in bits 5-7, those shouldn't matter according to the 80386/80486 scheme of doing things. ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + Paul Carroll "I don't believe there is a single + + HP Logic Systems Division man, woman, or child alive in + + paulc%hp-lsd@hplabs.hp.com America today that doesn't enjoy a + + lovely beverage!" - David Letterman + ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++