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From: jon@hitachi.uucp (Jon Ryshpan)
Newsgroups: comp.arch
Subject: Re: Is handling off-alignment important?
Message-ID: <467@hitachi.uucp>
Date: 11 Aug 90 19:18:05 GMT
References: <40711@mips.mips.COM> <12436@encore.Encore.COM>
Reply-To: jon@hitachi.UUCP (Jon Ryshpan)
Organization: Hitachi America - Semiconductor & IC Div.
Lines: 14

jkenton@pinocchio.encore.com (Jeff Kenton) writes:
>mash@mips.COM (John Mashey) writes:
>> Just out of curiosity, can anyone give some live examples where software
>> takes advantage of the mode where the CPU just zeroes the low-oorder
>> bits and conitnues, as in the 88K?  (or, I think(?), in the RT/PC).

>The only case I've seen is a low level, PROM based, debugger on the 88k which
>runs in this mode.  Presumably, this is done to save error checking or trap
>handling when the user types a misaligned address.

I can't imagine a *worse* place to turn off a trap detecting possible
errors than in a debugger.

Jonathan Ryshpan		<...!uunet!hitachi!jon>