Path: utzoo!attcan!uunet!samsung!zaphod.mps.ohio-state.edu!ncar!asuvax!mcdphx!udc!neutrino.urbana.mcd.mot.com!dfields From: dfields@neutrino.urbana.mcd.mot.com (David Fields) Newsgroups: comp.arch Subject: Re: Interrupts in user space Message-ID: <1391@urbana.mcd.mot.com> Date: 20 Sep 90 13:59:02 GMT References: <12738@encore.Encore.COM> <1990Sep18.152339.25203@tera.com> <3793@goanna.cs.rmit.oz.au> Sender: netnews@urbana.mcd.mot.com Reply-To: dfields@urbana.mcd.mot.com Lines: 22 In article <3793@goanna.cs.rmit.oz.au>, ok@goanna.cs.rmit.oz.au (Richard A. O'Keefe) writes: |>As far as delay slot filling is concerned, this is exactly like |> [ Bcc | LOAD (curptr), dest ] |>{that is, both kinds of instruction combined in one}. Either the |>instructions in the delay slots can safely be executed anyway, or |>else you have to be able to annul them. But that's true of any |>conditional branch. How complex is this condition? Well, the 88k |>does "if R1 = R2 then goto L" as one conditional branch, and that's |>all we need here. So |> Just to set the recored straight, the 88k does not have such an instruction. There is a conditional branch which tests for eq0,ne0,gt0,ge0,lt0 and le0 but if you want to test equality of two registers it's a two instruction sequence. Others have pointed out the tricks required to resume after an exception on the 88100. Dave Fields // Motorola MCD // uiucuxc!udc!dfields // dfields@urbana.mcd.mot.com