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From: rob@idacom.uucp (Rob Chapman)
Newsgroups: comp.lang.forth
Subject: of peasants and queues and dataflow
Message-ID: <1990Sep26.084008.8616@idacom.uucp>
Date: 26 Sep 90 08:40:08 GMT
Organization: IDACOM, a division of Hewlett-Packard
Lines: 49

>The question should not be "how do we get parallelism _despite_ FORTH's
>stack?"; it should be "How best can we use the power of the stack to implement
>multiprocessing?".

 Stacks are best left attached to one processor due to there uniflow nature.

>As far as I can see, the main problem in parallelism is the efficient
>communication of data and instructions between processors.  Stacks are an
>efficient way of passing data between words (tasks, subroutines, whatever);
>perhaps there's some way of passing data and/or instructions between processors
>using stacks.

 The natural complement to stacks (LIFOs) in Forth, are queues (FIFOs).
 These may be used for efficient communication between processors.

>                              ......              I'm mostly interested
> in Forth as a virtual machine for data flow architecture (does anybody
> talk about this anymore?) and multiprocessor architectures.
>

 Queues are useful for containing a segment of data flow and providing
 elasticity between processes (or processors) in a real-time data flow
 architecture.

 I use stacks for local activity and queues for passing data (or instructions)
 between processes.  While there are many queues used in data flow, one
 queue feeds the program counter (control flow).  It is called the peasantq.
 botForth's QUIT loop is

	BEGIN  peasantq Q> EXECUTE  AGAIN

 Code to be run is assigned to the peasantq with ' .

	' something peasantq >Q

 These can come from interrupts or from "peasant" code when it is executed
 from the peasantq.  Polling words simply assign themselves back to the
 peasantq.

 Initially, in software, it took 5us on the RTX to write to the peasantq
 (this included error checking and interrupt masking).  We reimplemented the
 peasantq as a hardware FIFO hanging off the GIO bus and it now takes 100ns
 to access it (overflow is connected to NMI).

 Leaping back to the main thread; it would be very easy to interconnect RTXs
 with up to 8 FIFOs hanging off the GIO bus, to form a very efficient data
 flow as well as control flow architecture.

Rob