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From: barnettj@pookie.crd.ge.com (Janet A Barnett)
Newsgroups: comp.sys.amiga.tech
Subject: Re: Micro Timing Critical sections HELP!
Message-ID: <12103@crdgw1.crd.ge.com>
Date: 23 Sep 90 15:41:22 GMT
References: <4934@uqcspe.cs.uq.oz.au> <14567@cbmvax.commodore.com>
Sender: news@crdgw1.crd.ge.com
Organization: General Electric Corporate R&D Center
Lines: 21

In article <14567@cbmvax.commodore.com> daveh@cbmvax.commodore.com (Dave Haynie) writes:
> Disable()/Enable() turn off all interrupt processing,
>which as a result also happens to disable multitasking.
>
>Disable()/Enable(), by definition, will disable all valid interrupts.  Or, to
>invert this argument, interrupts that don't get disabled by Disable() aren't
>supported by the AmigaOS.  The only such interrupts you could get that are
>members of this class are expansion-board-generated INT1*, INT4*, INT5*, or
>INT7* on an A2000.
>
Here is my understanding of Disable(): Rather than set the CPU's interrupt 
mask to 0x7, the custom chip register INTENA is
written such that no interrupt requests are allowed.  Here is my question:
Does this actually prevent interrupting devices (such as the video circuitry
at the start of vertical blanking) from causing a transition of the CPU's
IPL lines?  To put this question another way, is Disable() a logical
function wherein interrupts of the CPU are not physically disabled but
rather simply masked out by RTEing immediately or does the interrupt
control on the custom chip actually block IPL transitions to the CPU?

I wanna know.