Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!hp-pcd!hpfcso!steve-t
From: steve-t@hpfcso.HP.COM (Steve Taylor)
Newsgroups: comp.sys.apollo
Subject: Re: Re: standard SIMMs in s400?
Message-ID: <9330006@hpfcso.HP.COM>
Date: 21 Sep 90 17:39:02 GMT
References: <13730005@hpspdra.HP.COM>
Organization: Hewlett-Packard, Fort Collins, CO, USA
Lines: 28

} It's also odd that the message refers to 64 bit data paths, at the sales
} literature I have been given by our HP sales office states that the bus
} width is 32-bit data/32-bits address ("HP Apollo 9000 Models 400s and 433s
} Technical Data", July 1990).

I'm not a hardware type, but I think the 32/32 refers to the I/O bus (i.e.,
plug-in cards and peripheral interfaces) while the 64 bit data path is from
external cache to system RAM.

} As for the ECC ... yes, it does make for a more reliable machine,
} theoretically. We have 5 DN2500's and about a dozen Sparcstations in our
} department with at least 8 or 16 MB each, 
} They've been running for nearly a year with 0 failures.

For older HP Series 300s with separate memory cards, it was possible to get
either Parity or ECC memory.  However, parity was only supported up to some
limit (? 24 or 32 Meg ?).  Beyond that limit, only ECC memory was supported.
This was based on observed behavior, not theory.

I expect that now that the memory controller is built into the SPU board
instead of on a separate memory board, that only one controller is provided,
hence ECC for all.

							Steve taylor

Disclaimer:  I was not/am not involved in the design of this hardware.
	     This is all hearsay/rumor.  And in any case:
NOT A STATEMENT, OFFICIAL OR OTHERWISE, OF THE HEWLETT-PACKARD COMPANY.