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From: leech@homer.cs.unc.edu (Jonathan Leech)
Newsgroups: comp.sys.next
Subject: Re: Some specs on the new machines
Message-ID: <16177@thorin.cs.unc.edu>
Date: 20 Sep 90 23:05:47 GMT
References: <26F8F06E.10749@orion.oac.uci.edu>
Sender: news@thorin.cs.unc.edu
Reply-To: leech@homer.cs.unc.edu (Jonathan Leech)
Organization: University Of North Carolina, Chapel Hill
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In article <26F8F06E.10749@orion.oac.uci.edu> sfrank@orion.oac.uci.edu (Steven Frank) writes:
>In article <SMITHW.90Sep19221915@hamblin.hamblin.math.byu.edu> smithw@hamblin.math.byu.edu (William V. Smith) writes:
>>There is also a 3rd party
>>board available with two i860's on it claiming 160 Mflops.
>Can the i860's be accessed as numerical coprocessors?	If so, then a
>board with two i860's would make the NeXT one of the fastest RISC
>machines around for simulations.  To be useful, there would have to
>be a C (some obj type C) compiler for the i860.

    Nowhere near the 80 MFLOPS peak performance is obtainable in real
applications.  Between external memory bandwidth constraints and the
poor code generated by current C compilers, expect maybe 1/20 this
performance (based on our experiences with the 860 boards built here
for the Pixel-Planes graphics machine).
--
    Jon Leech (leech@cs.unc.edu)    __@/
    ``God is more interested in your future and your relationships
      than you are.'' - Billy Graham