Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sun-barr!apple!vsi1!daver!bungi.com!news Newsgroups: comp.sys.nsc.32k Subject: one step closer... Message-ID: Date: 20 Sep 90 17:07:50 GMT Sender: news@daver.bungi.com Lines: 33 Approved: news@daver.bungi.com Well, I just checked the a startup of my pc532 with a logic analyser. I believe the following: 1) my previous problems were caused by using a nv-sram that had a 32Kx8 RAM pinout instead of an EPROM pinout (oops...) 2) The nv-sram wasn't due to either it's battery or controller being bad. These two problems have been fixed, and the pc532 now gets the correct data out of the eprom for at least 10-15 bytes. I now need a copy of the image of a "float-less" monitor, I believe that loading the cfg register is eventually putting mine in the weeds. Is this true? or does it need to go a LONG way to hit an fp instruction to blow it up? George, Thanks for the help, sorry I never got back to you, but I got busy. (finding all this out only took a few hours, mostly setting up the analyser) It wasn't that hard, just finding a couple of simple mistakes, and the time to look for them. Bruce, could you send me a copy of the float-less rom image? Thanks. And can anyone tell me if my guess about the cfg register is correct? (I still need to hook it up to a terminal, one wasn't handy at the moment.) At around 300-350 cycles the data bus had FF's on it ALL the time, is this the DRAM initialization, or is it going off in space? Also, I pulled my memory SIMMs from my Mac, so it is 8-bit not 9, do I just need to leave out the parity pal, or can I leave it in, or is there some other hack that's needed? This all seemed general enough to post to the list, sorry if any you feel otherwise. I'm also sorry that this became a bit more verbose then I had expected... excitement can do odd things to people... -- Jon Buller jonb@vector.dallas.tx.us ..!texsun!vector!jonb FROM Fortune IMPORT Quote; FROM Lawyers IMPORT Disclaimer;