Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!wuarchive!mit-eddie!bloom-beacon!eru!hagbard!sunic!mcsun!ukc!pyrltd!root44!jgh From: jgh@root.co.uk (Jeremy G Harris) Newsgroups: comp.arch Subject: Re: Cache Line Fills -- Critical Word First Keywords: cache memory Message-ID: <2454@root44.co.uk> Date: 3 Oct 90 09:00:50 GMT References: <34275@cup.portal.com> <14780@cbmvax.commodore.com> <41856@mips.mips.COM> Reply-To: jgh@root.co.uk (Jeremy G Harris) Organization: UniSoft Ltd, London, England Lines: 24 In article <41856@mips.mips.COM> mash@mips.COM (John Mashey) writes yet another long and informative exposition.... >[...] >For the I-cache, when you have a cache miss: > I1) You can stall the machine, fetch the entire cache block, > then restart. This is clearly the simplest. > I2) You can do "early restart", where you begin executing as soon > as the requested word is available. [...] > I3) You can do "out-of-order fetch" in addition to early restart, > and then do "wrapped fetch", so that you wrap-around to complete. Does anyone do: I4) Out-of-order fetch with early restart but without wrapped fetch? Extra hardware is needed to mark unavailible words within the line; would checking these marks be too slow? (orthogonal possibility) XX) Prefetch of next line on access of last word of line? Disclaimer: I've never designed a memory system. -- Jeremy Harris jgh@root.co.uk +44 71 315 6600