Path: utzoo!attcan!uunet!world!esegue!compilers-sender From: pardo@cs.washington.edu (David Keppel) Newsgroups: comp.compilers Subject: Re: Compiling for DSP chips Keywords: C, optimize, DSP Message-ID: <13148@june.cs.washington.edu> Date: 26 Sep 90 23:13:03 GMT References: <9009071606.AA22759@m2.csc.ti.com> <1990Sep11.075042.937@funet.fi> <4751@taux01.nsc.com> Sender: compilers-sender@esegue.segue.boston.ma.us Reply-To: pardo@cs.washington.edu (David Keppel) Organization: University of Washington, Computer Science, Seattle Lines: 21 Approved: compilers@esegue.segue.boston.ma.us In article <4751@taux01.nsc.com> avi@taux01.nsc.com (Avi Bloch) writes: >[Compiler that optimizes for special instructions.] The moderator writes: >[GCC lets you in-line assembler, frequently hidden inside macros, that is >often used to get to features like sin and cos instructions. -John] In particular, you can tell GCC that certain hard registers are clobbered, so GCC can perform register allocation around those instructions. If the machine description knows about those instructions, then I think that it is also possible to define optimizations over those instructions, even if the compiler itself doesn't ``know'' how to emit them. ;-D on ( A compile of things to do ) Pardo -- pardo@cs.washington.edu {rutgers,cornell,ucsd,ubc-cs,tektronix}!uw-beaver!june!pardo -- Send compilers articles to compilers@esegue.segue.boston.ma.us {ima | spdcc | world}!esegue. Meta-mail to compilers-request@esegue.