Path: utzoo!attcan!uunet!cs.utexas.edu!sdd.hp.com!zaphod.mps.ohio-state.edu!wuarchive!psuvax1!rutgers!cbmvax!daveh
From: daveh@cbmvax.commodore.com (Dave Haynie)
Newsgroups: comp.sys.amiga.hardware
Subject: Re: GVP 3001 Caches
Keywords: MTBF?
Message-ID: <14810@cbmvax.commodore.com>
Date: 2 Oct 90 18:18:55 GMT
References: <1990Sep24.155842.24733@jarvis.csri.toronto.edu> <3129@rtmvax.UUCP> <3551@rwthinf.UUCP>
Reply-To: daveh@cbmvax.commodore.com (Dave Haynie)
Organization: Commodore, West Chester, PA
Lines: 30

In article <3551@rwthinf.UUCP> helmutn@cip-s03.UUCP (Helmut Neumann) writes:
>Hi,

>does anybody out there know, how to activate the Caches of
>the GVP 3001 to work on Chip-Mem. A 030-Board of a German
>developer does this, and it makes a tremendous speed-increase.

Well, for the instruction cache, you can enable caching, though it's not
likely to make much performance difference, since instructions are only rarely
located in Chip RAM as long as you have some Fast RAM.  Under no conditions
should you enable data caching of Chip RAM.  The system will crash very
quickly after reboot, guaranteed.

I don't know the GVP hardware, but it might be possible, with enough effort,
to reverse engineer the hardware cache control.  The 68030 cache is controlled
externally by a signal called CIIN* (Cache In INhibit).  The GVP board very
likely has a PAL of some kind controlling this signal.  That PAL will also have
a number of system address lines which are necessary to figure out what should
and shouldn't be cached.  You will also need the three function code lines
FC0-FC2, which aren't likely in that PAL.  Caching equations are very easy to
figure out for any Amiga system; the problem is, the cache control PAL on the
GVP board may generate other controls as well which are GVP rather than Amiga
related.  These may be difficult to figure out without GVP's help.

>Bye, Helmut.

-- 
Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests"
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	Standing on the shoulders of giants leaves me cold	-REM