Path: utzoo!attcan!uunet!aplcen!uakari.primate.wisc.edu!sdd.hp.com!zaphod.mps.ohio-state.edu!wuarchive!psuvax1!rutgers!cbmvax!daveh From: daveh@cbmvax.commodore.com (Dave Haynie) Newsgroups: comp.sys.amiga.hardware Subject: Re: GVP 3001 Caches Message-ID: <14811@cbmvax.commodore.com> Date: 2 Oct 90 18:34:05 GMT References: <3551@rwthinf.UUCP> <04071.AA04071@babylon.UUCP> Reply-To: daveh@cbmvax.commodore.com (Dave Haynie) Organization: Commodore, West Chester, PA Lines: 36 In article <04071.AA04071@babylon.UUCP> cbmvax.commodore.com!cbmehq!babylon!rbabel (Ralph Babel) writes: >In article <3551@rwthinf.UUCP> >helmutn@cip-s03.informatik.rwth-aachen.de (Helmut Neumann) writes: >> does anybody out there know, how to activate the Caches of >> the GVP 3001 to work on Chip-Mem. >Get the new set of PALs required for MMUKick. This will >enable the code cache in MEMF_CHIP. You cannot enable the >data cache. SetCPU 1.6, however, disables all caching in >MEMF_CHIP (maybe Dave should make this an option). There's a good reason for this behavior, which was intended for A3000 support. The 68030 will cache longword data written to a longword port, regardless of the status of the hardware cache enable. That includes Chip memory on the A3000, though of course enhanced A2000s are still dealing with 16 bit Chip RAM. The 68030 cache does, however, obey the caching information set up by the MMU. To handle I and D spaces separately, though, you have to build at least two different MMU tables, which is generally a waste of memory. And it slows down the system, since you'll have twice as many translation entries. If you don't have any Fast memory, you won't be using SetCPU's MMU table setup in the first place. If you do have Fast memory, you aren't going to run into many cases in which there's any code to worry about in Chip memory in the first place. Some of the MMU programs, like SetCPU V1.5 or MMUKick, required I-cachable Chip memory simply because that was the most direct solution to the reboot problem in a system like the A26x0 which supported this. But I really don't see too much advantage to I-caching of Chip RAM. >Ralph -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy Standing on the shoulders of giants leaves me cold -REM