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From: herwin@pro-novapple.cts.com (Harry Erwin)
Newsgroups: comp.sys.apple2
Subject: Re: RISC Machines
Message-ID: <15800.netnews.info-apple@pro-novapple>
Date: 3 Oct 90 16:42:50 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
Organization: The Internet
Lines: 13

In-Reply-To: message from scottg@gnh-starport.cts.com

>By definition, RISC computers, apart from having a load/store architecture,
>execute most if not call instructions in one machine cycle.
Not quite the case.  RISC computers typically have a pipelining architecture
that allows them to execute an instruction per cycle.  Very few reach that
rate except in carefully hand-coded software.  Most do quite a bit worse in
most applications.
Harry Erwin   -->Remember, no good deed goes unpunished...
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