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From: dmurdoch@watstat.waterloo.edu (Duncan Murdoch)
Newsgroups: comp.sys.ibm.pc.hardware
Subject: Re: Faster 387s and 486 timing (was: Cyrix CX-803D87-20 Coprocessor)
Message-ID: <1990Oct2.133130.11674@maytag.waterloo.edu>
Date: 2 Oct 90 13:31:30 GMT
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In article <9010012252.AA06030@esegue.segue.boston.ma.us> johnl@esegue.segue.boston.ma.us (John R. Levine) writes:
>
>A careful inspection of the table of contents reveals section 18.2 which is
>named CONCURRENT PROCESSING.  It tells us that the internal architecture of
>the 486 is similar to a 386/387 combo in that the integer and floating point
>units can operate independently.  For example, although the FSIN instruction
>takes about 241 cycles, the concurrent time is 2 cycles, so the CPU can
>proceed with another integer instruction two cycles later and can execute up
>to 239 cycles of fixed point instructions while the FPU thinks.
>
>This is an extreme example since FSIN has to do a lot of work and all of its
>sources and results live inside the FPU.  More typical is FMUL which takes
>16 cycles with 13 concurrent.  A clever code scheduler (or assembler
>programmer) can improve performance quite a lot by interleaving floating and
>fixed instructions to keep both units active.

Thanks for pointing out that section.  I'd read it, but couldn't believe
that it applied here.  I wonder why the divides take so much integer cpu time 
(70 cycles of it)?

Duncan Murdoch