Path: utzoo!attcan!uunet!know!zaphod.mps.ohio-state.edu!mips!lloyd!cprice
From: cprice@mips.COM (Charlie Price)
Newsgroups: comp.sys.mips
Subject: Re: R2000/R2010 instruction set query
Message-ID: <41798@mips.mips.COM>
Date: 28 Sep 90 18:34:03 GMT
References: <3774.27031c0e@cc.curtin.edu.au>
Sender: news@mips.COM
Reply-To: cprice@mips.COM (Charlie Price)
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In article <3774.27031c0e@cc.curtin.edu.au> tbaldonid@cc.curtin.edu.au (Danny Baldoni) writes:
>
>Can anybody tell me where I can find details on the instruction set and
>the binary formats for the instructions on an R2000/R3000 (and associated
>R2010/R3010) processor?

This gets asked a lot, so a posting (rather than just email) seems in order.

There is a book by Gerry Kane that is a description of the MIPS
architecture and the implementations in the
R2000/R3000 (CPUs) and R2010/R3010 (FPUs).
The R2000/2010 and R3000/3010 are essentially identical
at the instruction level

The book includes tables of instruction encodings.

The first edition was published before the R3000/R3010 were
done and the choice of title was unfortunate in view of the
R2000-R3000 similarity.  It was titled:
  MIPS R2000 RISC Architecture

The second (and current) edition is titled:
  MIPS RISC Architecture

Both editions are by Gerry Kane and published by Prentice Hall.

the reference numbers are:

0-13-584749-4	ISBN

88-060290	Library of Congress Card Number

This will not be the final word.
I am currently reviewing an alpha draft of the next edition
also titled "MIPS RISC Architecture".
This edition will cover both the MIPS I architecture
(the R2000/2010/3000/3010) and the extensions in the MIPS II
architecture (the R6000 and R6010).

-- 
Charlie Price    cprice@mips.mips.com        (408) 720-1700
MIPS Computer Systems / 928 Arques Ave. / Sunnyvale, CA   94086-23650