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From: chuck@trantor.harris-atd.com (Chuck Musciano)
Newsgroups: comp.arch
Subject: DEC RISC Architecture?
Message-ID: <4462@trantor.harris-atd.com>
Date: 10 Oct 90 11:41:21 GMT
Sender: news@trantor.harris-atd.com
Reply-To: chuck@trantor.harris-atd.com (Chuck Musciano)
Organization: Advanced Technology Dept, Harris Corp, Melbourne, FL
Lines: 32


     I have been hearing a rumor (corroborated by two independent sources)
that DEC is readying a new RISC processor.  Called either "Alpha" or
"Project Alpha", it is being developed in Oregon, and is yielding 100 MIPS.

     Further, I hear that DEC is considering three choices:
     
     1	Drop the project, and continue with their VAX/MIPS products.
     
     2	Use Alpha to replace their MIPS workstations, porting Ultrix.
     
     3	Use Alpha to replace their VAX machines, porting VMS.

While the urge to ruminate as to which of these choices is the fastest road
to corporate suicide is almost overwhelming, I will take the high road and
just ask the obvious:

     What is Project Alpha?

What architectural features make it a win over SPARC or MIPS?  Are they really
achieving 100 MIPS or more?  What is the implementation technology?  Does
anyone have any concrete information about this architecture?

-- 

Chuck Musciano				ARPA  : chuck@trantor.harris-atd.com
Harris Corporation 			Usenet: ...!uunet!x102a!trantor!chuck
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