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From: preston@titan.rice.edu (Preston Briggs)
Newsgroups: comp.arch
Subject: Re: speculative execution
Message-ID: <1990Oct10.170424.21489@rice.edu>
Date: 10 Oct 90 17:04:24 GMT
References: <3431@bnr-rsc.UUCP> <1990Oct9.224312.2031@rice.edu> <3432@bnr-rsc.UUCP>
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In article <3432@bnr-rsc.UUCP> bcarh185!schow@bnr-rsc.UUCP (Stanley T.H. Chow) writes:
>I assume you mean given two machines, otherwise identical, differing
>only in that M1 does hardware speculative execution and M2 does not,
>you can write a compiler that will make M2 run faster than M1.

That's what I believe.

>This sounds wrong. I do not doubt that you can speedup M2 by speculative
>execution (with hoisting, etc). But surely the same technology can be
>applied to M1 with the same result. A priori, I would expect the benifit
>to be the same for both machines.

Well, I wan't going to let M1 use my fabulous scheduling ideas.
It had to be satidfied with hardware.  Further, M2 ought to have a
higher clock speed since its hardware is simpler.

>On the other hand, there are many things that *need* H/W. E.g., pre-
>fetching (and executing) multiple paths. Surely these gains are additive
>to those of the compiler.

I feel like I haven't made myself clear.

I'm advocating a wide instruction word so that I can, in a single
instruction, specify enough work to keep all the resources busy.
Ways of accomplishing this include trace scheduling,
global compaction, and software pipelining.

Speculative execution hardware notices that it has resources
that aren't fully utilized and tries to find work for them to do.

I suppose the advantage of speculative hardware is that you can use
a skinny instruction word to get some of the same effect, 
non-deterministically.

So fancy hardware can get some parallelism without fancy software,
and fancy software can get some parallelism without fancy hardware.
Given one, I don't think you need the other.  So is it cheaper
to build the compiler or the chip?  Don't forget to make them
correct.

-- 
Preston Briggs				looking for the great leap forward
preston@titan.rice.edu