Path: utzoo!attcan!uunet!cs.utexas.edu!swrinde!zaphod.mps.ohio-state.edu!samsung!emory!gatech!prism!dali!ken From: ken@dali.gatech.edu (Ken Seefried iii) Newsgroups: comp.arch Subject: Re: DEC RISC Architecture? Message-ID: <15007@hydra.gatech.EDU> Date: 11 Oct 90 15:42:33 GMT References: <4462@trantor.harris-atd.com> <107038@convex.convex.com> Sender: news@prism.gatech.EDU Reply-To: ken@dali.gatech.edu (Ken Seefried iii) Organization: The House Of Fun Lines: 15 In article <107038@convex.convex.com> pelakh@mozart.convex.com (Boris Pelakh) writes: >I don't know much about this new processor, but option 3 - porting VMS to RISC >seems to be highly unlikely, considering the fact that VMS heavily >relies on the >original VAX architecture with it's ultra-CISC style instruction set. I believe that DEC has already announced that it is deep into a project to port VMS to the MIPS machines. If I remember correctly, they expect to have something within two years. -- ken seefried iii ken@dali.gatech.edu "Vee haf veyz off making you talk...release da veasles..."