Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!know!sdd.hp.com!uakari.primate.wisc.edu!uflorida!haven!mimsy!mojo!SYSMGR@KING.ENG.UMD.EDU From: sysmgr@KING.ENG.UMD.EDU (Doug Mohney) Newsgroups: comp.arch Subject: Re: DEC RISC Architecture? Message-ID: <0093E081.85D1F940@KING.ENG.UMD.EDU> Date: 11 Oct 90 17:00:47 GMT References: <4462@trantor.harris-atd.com> <107038@convex.convex.com>,<15007@hydra.gatech.EDU> Sender: news@eng.umd.edu (The News System) Reply-To: sysmgr@KING.ENG.UMD.EDU (Doug Mohney) Organization: The U. of MD, CP, CAD lab Lines: 14 In article <15007@hydra.gatech.EDU>, ken@dali.gatech.edu (Ken Seefried iii) writes: >I believe that DEC has already announced that it is deep into a >project to port VMS to the MIPS machines. If I remember correctly, >they expect to have something within two years. Nooooo..DEC is porting to a "RISC" architecture. According to Digital Review, they have one more generation of pure-CISC chips to pump out for VAX machines, before they go to a hybred chip which is RISCy but runs the VMS command set. They are also working on a "portable" VMS written in C, but I'm not so sure if they are committed to port it to the MIPS machines. That would mean they would have difficulty selling VAX hardware, because the price/performance between VAX hardware and MIPS hardware is different by a factor of 2-3.