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From: lindsay@gandalf.cs.cmu.edu (Donald Lindsay)
Newsgroups: comp.arch
Subject: Re: speculative execution
Message-ID: <10728@pt.cs.cmu.edu>
Date: 11 Oct 90 18:07:14 GMT
References: <1990Oct9.212103.363@rice.edu> <12905@encore.Encore.COM> <1990Oct10.164353.21070@rice.edu> <1990Oct10.212713.28260@rice.edu>
Organization: Carnegie-Mellon University, CS/RI
Lines: 16

In article <1990Oct10.212713.28260@rice.edu> preston@titan.rice.edu 
	(Preston Briggs) writes:
>>Regarding compilers, I believe The Portland Group and Ardent both have
>>compilers that will take advantage of the pipelined instructions.
>Instead of Ardent, I should have said Alliant.

I've been waiting for someone else to rain on this parade.  Since no
one has, I will point out that Alliant's compiler was _not_ shipped
on schedule.  In general, i860 compilers so far have justified the
pessimists more than the optimists.

It would be interesting to find out _which_ of the i860's features
causes the most compiler difficulty.  The T, KI, KR registers?  The
non-self-draining pipeline?  Scheduling? IEEE issues?
-- 
Don		D.C.Lindsay