Path: utzoo!attcan!uunet!decwrl!csus.edu!ucdavis!csusac!csuchico.edu!mrush From: mrush@csuchico.edu (Matt "C P." Rush) Newsgroups: comp.sys.amiga.hardware Subject: Re: 14 mhz Hack Message-ID: <1990Oct06.011600.9977@ecst.csuchico.edu> Date: 6 Oct 90 01:16:00 GMT References: <3357@mindlink.UUCP> <14787@mentor.cc.purdue.edu> Sender: news@ecst.csuchico.edu (USENET) Reply-To: mrush@cscihp.UUCP Organization: California State University, Chico Lines: 27 In article <14787@mentor.cc.purdue.edu> andrewtn@mentor.cc.purdue.edu (Trevor Andrews) writes: > >I am about to implement the 14Mhz Hack and would like to know how >I should half the 'E' line on the 68000. The schematics look very >clean and easy but I would really rather not have my floppies >overloaded. Any help or information on the 'E' line would >be greatly appreciated! I'm not interested in the software patch >or reprograming the timer interrupts. Unless that is a lot easier >than the halving of the 'E' line. Will I lose any performace gains >by keeping the 'E' line at 7Mhz? I wouldn't think so... The best suggestion I've heard for the E-clock problem is to use the other FlipFlop in the 74F74 to divide the the accelerated output from the E-clock. Is phasing likely to be an issue if this is done? Of course this would require a little extra consideration in the circuit for the speed-switch (don't divide the E-clock at normal speed). -- Matt *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~* % "I programmed three days % Beam me up, Scotty. % % And heard no human voices. % There's no Artificial % % But the hard disk sang." % Intelligence down here. % % -- Yoshiko % % E-mail: mrush@cscihp.ecst.csuchico.edu % *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~* This is a SCHOOL! Do you think they even CARE about MY opinions?!