Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!snorkelwacker!apple!agate!darkstar!ucscb.UCSC.EDU!unknown
From: unknown@ucscb.UCSC.EDU (The Unknown User)
Newsgroups: comp.sys.apple2
Subject: Re: ASIC and Transwarp
Message-ID: <7587@darkstar.ucsc.edu>
Date: 8 Oct 90 00:51:27 GMT
References: <520@fawlty.towers.oz>
Sender: usenet@darkstar.ucsc.edu
Organization: University of California, Santa Cruz; Open Access Computing
Lines: 29


In article <520@fawlty.towers.oz> johnmac@fawlty.towers.oz (John MacLean) writes:
>I for one have my money waiting for a 17 MHz ASIC 65816 if they can ever
>produce. Given that they are supposed to meet power supply requirements
>for the Transwarp, all you need to replace are the processor, the
>crystal, and the static RAMs to get upwards of 13 MHz.
>According to the article recently posted, 15ns static RAMs are required
>at 13 Mhz; does anyone know just how fast you can get static RAMs, how
>expensive they are, and just how fast would you have to go to get even
>faster speeds out of the Transwarp (say around 15 - 17 Mhz)? 

	Since one cycle is the fastest memory can be theoretically
accessed (I think it's not that fast on the Apple II and/or IIGS, but
this will give minimum levels ever necessary), I figured out how fast
the RAM'd have to be to support 17 megahertz by doing the simple calculation
1/17000000  on my HP calculator! (Hey, I always gotta give them a free ad!
HP calculators are the best! Reverse Polish Notation! YEAH!)

	That gives about 59 nanoseconds.. I just remembered that on the
previous Apple IIs at least, you had to get memory for a speed of 
the CPU that was twice the real CPU's speed. So presuming that's still
true on the GS, 29 nanoseconds is fast enough for 17 megahertz.
For 25 megahertz, the RAM'd have to be 20 nanoseconds as the lowest
value needed for one cycle/access.


-- 
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