Path: utzoo!attcan!uunet!decwrl!wuarchive!zaphod.mps.ohio-state.edu!samsung!umich!yale!cmcl2!adm!smoke!gwyn
From: gwyn@smoke.BRL.MIL (Doug Gwyn)
Newsgroups: comp.sys.apple2
Subject: Re: RAM speed for fast 65816s (was:Re: ASIC and Transwarp)
Message-ID: <14064@smoke.BRL.MIL>
Date: 9 Oct 90 12:49:16 GMT
References: <7587@darkstar.ucsc.edu> <14053@smoke.BRL.MIL> <7619@darkstar.ucsc.edu>
Organization: U.S. Army Ballistic Research Laboratory, APG, MD.
Lines: 7

In article <7619@darkstar.ucsc.edu> unknown@ucscb.UCSC.EDU (The Unknown User) writes:
>That's a simplistic calculation, yes, but is it not correct that it's the
>LOWEST (that is, FASTEST) value you'd ever need for a certain speed of a CPU?

No, in fact it's an upper bound on the chip response time or a lower bound
on speed.  Because more than one atomic event occurs within a clock cycle,
the actual requirements are "stiffer" than the calculation would indicate.