Xref: utzoo comp.sys.ibm.pc.misc:2361 comp.binaries.ibm.pc.d:9758 comp.sys.laptops:1322 Path: utzoo!attcan!uunet!samsung!zaphod.mps.ohio-state.edu!ncar!boulder!atk From: atk@boulder.Colorado.EDU (Alan T. Krantz) Newsgroups: comp.sys.ibm.pc.misc,comp.binaries.ibm.pc.d,comp.sys.laptops Subject: Re: **** PHEONIX 386 BIOS QUESTION IN MY ZEOS LAPTOP! **** Message-ID: <27514@boulder.Colorado.EDU> Date: 4 Oct 90 11:54:24 GMT References: Sender: news@boulder.Colorado.EDU Reply-To: atk@boulder.Colorado.EDU (Alan T. Krantz) Organization: University of Colorado, Boulder Lines: 29 In article jc58+@andrew.cmu.edu (Johnny J. Chin) writes: >80386 BIOS have a feature called "shadow ram". > >On some BIOSes, you can disable the "shadow ram" and free up the memory >space between 640k and 1Mb. Some BIOSes will still reserve this space >even if you disabled the "shadow ram". But, by disabling the "shadow ram", >you will cause the computer to operate slower due the the "far" reference >for ever BIOS interrupt call. > > I don't believe this is correct. The addresses (as far as the program is concerened) is the same if the bios is executed from RAM or ROM. The differences is that the ROM has a much slower access time hence wait states are probably inserted when code is executed from ROM. Actually, I'm not too sure how this is done - I've wired up a 68xxx before and it wasn't too difficult to dynamicly set the number of wait states - but I'm not sure how it's done on the intel chips - but in any event it has nothing to do with "far" references.... ------------------------------------------------------------------ | Mail: 1830 22nd street Email: atk@boulder.colorado.edu| | Apt 16 Vmail: Home: (303) 939-8256 | | Boulder, Co 80302 Office: (303) 492-8115 | ------------------------------------------------------------------