Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sun-barr!rutgers!mcdchg!michael
From: michael@mcdchg.chg.mcd.mot.com (Michael Bodine)
Newsgroups: comp.sys.m68k
Subject: Re: 68020 Instr Cache
Message-ID: <47495@mcdchg.chg.mcd.mot.com>
Date: 11 Oct 90 14:32:09 GMT
References: <1990Oct9.184632.18064@ariel.unm.edu>
Reply-To: michael@chg.mcd.mot.com (Michael Bodine)
Organization: Motorola Computer Group, Schaumburg, IL
Lines: 16

Slix (jstearns@draco.unm.edu) writes:
> I am seeking information on how to turn the 68020's Instr cache off
> and on via hardware.  The only literature I have been able to find says
> that there is a cache disable pin, but not how to use it.  Does anyone
> know exactly how this pin is used or where to find specs??  I have been told
> that the MC68020 user's manual does not have this info. (hard to believe...)
Yes...a RIDICULOUS assertion!  My 020 manual, MC68020UM/AD REV 2, available
from Motorola Semiconductor or from your nearest good (technical) bookstore,
has section 5.10.1 describing the cache disable pin (it's CDIS*, active low)
and refers you also to 6.1 On-Chip Cache Organization and Operation for
a description of cache operation, and to 11 Application Information for a
description of how this signal is used to assist emulator operation and
debugging.
-- 
[  Michael Bodine, michael@chg.mcd.mot.com, Dial: (708) 576-7840, FAX: x8875  ]
[  Motorola MCD; Loc IL38; 1100 Woodfield; Suite 334;  Schaumburg, Il  60173  ]