Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!tut.cis.ohio-state.edu!zaphod.mps.ohio-state.edu!mips!winchester!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.sys.m88k Subject: Re: Emulating other computers on 88K's and Benchmarks Message-ID: <41965@mips.mips.COM> Date: 8 Oct 90 05:45:05 GMT References: <1990Oct3.095041.9295@canterbury.ac.nz> Sender: news@mips.COM Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Inc. Lines: 33 In article newton@smoggy.gg.caltech.edu (Mike Newton) writes: >The m88k has a fundamental advantage over the other RISC's that I know >regarding: > Interpetation of code for other processors > Compilers for certain very high level languages -- (especially: Prolog) >and this is 31 truly general purpose registers. I'm afraid this posting needs a grain of salt. Most current commercial RISCs have at least 32 integer registers available at once, plus at least 32 32-bit FP, or 16 64-bit FP. These include: MIPS, SPARC, AMD 29K, Intel i860, IBM POWER, HP PA. Clipper indeed has less registers. All of the rest have at least 2X the general purpose (integer + FP) register state of the 88K... Please read Kane's book "The MIPS RISC Architecture", published by Prentice-Hall, and available since 1987... ... >There is also certain advantages with the 88k over the MIPS (an great >chip, but only 16 reg.s!) in that more of the paging / address translation Again, 32 integer + 16 64-bit FP. Maybe you're thinking of the Stanford MIPS chip, which indeed had 16 integer registers, but is fairly irrelevant at this point. >lines are accessible. This would ease the work of some translate-on-the >fly interpretation routines as well as overlay and self-modifying code >detection. I'm at a loss to understand what this means. Say more about the feature being compared with?? -- -john mashey DISCLAIMER: UUCP: mash@mips.com OR {ames,decwrl,prls,pyramid}!mips!mash DDD: 408-524-7015, 524-8253 or (main number) 408-720-1700 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086