Path: utzoo!attcan!uunet!wuarchive!cs.utexas.edu!rice!titan.rice.edu!preston
From: preston@titan.rice.edu (Preston Briggs)
Newsgroups: comp.arch
Subject: Re: speculative execution
Message-ID: <1990Oct12.144254.11371@rice.edu>
Date: 12 Oct 90 14:42:54 GMT
References: <2321@charon.cwi.nl> <1990Oct11.191126.21408@rice.edu> <2326@charon.cwi.nl>
Sender: news@rice.edu (News)
Organization: Rice University, Houston
Lines: 28

In article <2326@charon.cwi.nl> dik@cwi.nl (Dik T. Winter) writes:

>As far as I understand the processor this is still wrong:
> > So, if we'd had an if-then-else instead, we might get this result.
> >            int-1, pfmul.ss f3,f4,f0     <--- These floats hoisted from
> >            int-2, pfmul.ss f0,f0,f0     <--- from the then clause
> >            int-3, pfmul.ss f0,f0,f0
> >            if (something) {
> >                pfmul.ss f0,f0,f5
> >            }
> > 	   else {
> >                pfmul.ss f7,f8,f0	-- draining the pipe
>Note the above instruction may generate a result trap because the result of the
>multiplication of f3 and f4 is stored in this stage!  (Nowhere in the
>documentation do I find that result traps are discarded if the result is
>stored in f0.

It looks like you're right.  Silly me. (That's what I say instead of
typing a long string of cuss words).  If somebody at Intel knows differently,
I'd appreciate hearing about it!

I guess I must therefore advocate interpreting stores to f0 as "discard
everything".  Any reason not to?  (Besides the cost of changing the 
chip, documentation, ...)

-- 
Preston Briggs				looking for the great leap forward
preston@titan.rice.edu