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From: brett@cayman.amd.com (Brett Stewart)
Newsgroups: comp.arch
Subject: Re: speculative execution
Message-ID: <1990Oct12.194622.9464@mozart.amd.com>
Date: 12 Oct 90 19:46:22 GMT
References: <1990Oct9.212103.363@rice.edu> <12905@encore.Encore.COM>
Sender: usenet@mozart.amd.com (Usenet News)
Reply-To: brett@cayman.AMD.COM (Brett Stewart)
Organization: Advanced Micro Devices, Inc., Austin, Texas
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>From article <1990Oct9.212103.363@rice.edu>, by preston@titan.rice.edu (Preston Briggs):
> 
> In general, we need to be careful about fatally increasing
> register pressure.  The i860's exposed pipeline provides an
> elegant way out, allowing simple aborts of optimistic 
> computations by ignoring what's partially computed in
> the pipe.
>
One of the advantages of variable register-stack cache window frames
of the 29000 family is the instant availability of relief of
register pressure.  Michael Tiemann, of Cygnus Support, also has
some very interesting ideas about compiler techniques for
superscalar architectures that would allow the possibly large
numbers of registers of a procedure in the 29K to be used for
optimistic computation in the gnu c or other Fraser-Davidson UVa
type compiler schemes.  Comments, Michael?
Best Regards; Brett Stewart
Advanced Micro Devices, Inc.           1-512-462-5321  FAX
5900 E. Ben White Blvd MS561           1-512-462-4336  Telephone
Austin, Texas 78741      USA           brett@cayman.amd.com