Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uwm.edu!ux1.cso.uiuc.edu!ux1.cso.uiuc.edu!aglew From: aglew@crhc.uiuc.edu (Andy Glew) Newsgroups: comp.arch Subject: Re: Historical architectural advances?? Message-ID: Date: 15 Oct 90 03:21:51 GMT References: <8139@scolex.sco.COM> <1990Oct13.035313.174@ingres.Ingres.COM> <1990Oct13.200414.3523@motaus.sps.mot.com> Sender: news@ux1.cso.uiuc.edu (News) Organization: Center for Reliable and High-Performance Computing University of Illinois at Urbana Champaign Lines: 20 In-Reply-To: phil@motaus.sps.mot.com's message of 13 Oct 90 20:04:14 GMT >>VAX processor speed wasn't impressive. Ever. Its large flat virtual >>address spaces were. Particularly ten years ago and for a price that >>departments could afford. For that reason it could be considered an >>architectural advance. > >The MC68000 supports a 16MB linear address map. It has 8 32-bit >address registers (as well as 8 32-bit data registers), and all >address calculations are 32-bit precision. It was introduced in >1979. It is generally conceded that the 8Mhz MC68000, which went >into production in '81, is around 0.8 VUPS. And the MC68000 didn't have virtual memory. Not all instructions could handle page faults, etc. It took a while before the 68000 was suitable for use as a "real machine". I trust everyone knows about the twinned 68000s used in early Apollos? One a cycle behind the other, so that it could pick up at a page fault? -- Andy Glew, a-glew@uiuc.edu [get ph nameserver from uxc.cso.uiuc.edu:net/qi]