Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!rice!news!cliffc
From: cliffc@impala.usa (Cliff Click)
Newsgroups: comp.arch
Subject: Re: harvard architectures
Message-ID: <CLIFFC.90Oct16142600@impala.usa>
Date: 16 Oct 90 19:26:00 GMT
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	<7883@darkstar.ucsc.edu>
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In-Reply-To: haynes@ucscc.UCSC.EDU's message of 16 Oct 90 17:54:01 GMT


A lot of Forth chips bring out seperate address and data busses
for the control stack, data stack AND main memory - yes, 6 32-bit
buses.  Makes for a hefty bandwidth.

Cliff
--
Cliff Click                
cliffc@rice.edu