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From: raob@mullian.ee.mu.OZ.AU (richard oxbrow)
Newsgroups: comp.arch
Subject: 64 bit sparc ship sets
Message-ID: <5791@munnari.oz.au>
Date: 18 Oct 90 00:11:59 GMT
Sender: news@cs.mu.oz.au
Reply-To: raob@mullian.ee.mu.OZ.AU (richard oxbrow)
Organization: Dept. of Electrical Engineering, University of Melbourne
Lines: 18



	Does somebody have some detailed information about the 
	64bit sparc chips that they might like to post.

	More specifically the

	Matsushita  MN10501 (?) 64 bit sparc cpu with fpu,mmu and cache.	

	[The blurb that i am currently looking at says that it has an
	8k cache on board (6k instruction and 2k data).]


	richard ..
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