Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!uunet!world!esegue!compilers-sender From: anders@dit.lth.se (Anders Ardo) Newsgroups: comp.compilers Subject: Re: Compilers taking advantage of architectural enhancements Keywords: report, optimize, question Message-ID: <1990Oct17.085850.1355@lth.se> Date: 17 Oct 90 08:58:50 GMT References: <1990Oct12.230424.930@esegue.segue.boston.ma.us> <1689@seti.inria.fr> <1990Oct16.085249.13511@lth.se> <1990Oct16.173932.15085@rice.edu> Sender: compilers-sender@esegue.segue.boston.ma.us Reply-To: anders@dit.lth.se (Anders Ardo) Organization: Dep. of Computer Engineering, Lund Institute of Technology, Sweden Lines: 21 Approved: compilers@esegue.segue.boston.ma.us Have anyone put together a bibliography of papers on code generation issues and methods like those mentioned here, eg: >Branch Delay Slots ... >Register file ... >Multiple functional units ... >[etc.] and/or papers on the automation of these tasks in generated code generators? Anders -- Anders Ardo Tel: int+46 46 107522 Dept. of Computer Engineering fax: int+46 46 104714 University of Lund, P.O. Box 118 Internet: anders@dit.lth.se S-221 00 Lund, Sweden or anders%dit.lth.se@uunet.uu.net -- Send compilers articles to compilers@esegue.segue.boston.ma.us {ima | spdcc | world}!esegue. Meta-mail to compilers-request@esegue.