Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!ira.uka.de!smurf!gopnbg!mcshh!hkr From: hkr@mcshh.hanse.de (Holger Kruse) Newsgroups: comp.sys.amiga.tech Subject: ECS register description Keywords: graphics ECS hardware registers custom chips Message-ID: <8266@mcshh.hanse.de> Date: 15 Oct 90 17:10:46 GMT Distribution: comp Lines: 29 Does anyone have a detailed description of the new ECS registers, their usage, bitmapping etc. ? I just have the names of the new registers (like "bplcon3", "beamcon0","bplhmod" etc.), not their meaning. (I do not have the developer package of Kick2.0.) In the November-issue of "KICKSTART", a German Amiga magazine, Edwin Bielawski published the following description of "beamcon0" (translated to English): Bit 0: do not invert horizontal synch Bit 1: do not invert vertical synch Bit 2: do not invert composite synch Bit 4: allow variable composite synch signal Bit 5: 1=PAL-Mode, 0=NTSC-Mode Bit 7: allow free programming (caution !) Bit 8: allow variable horizontal synch signal Bit 9: allow variable vertical synch signal Unfortunately, I do not have a description of the "free programming mode" and all the other registers. Can someone help me ? -----------------------------+-------------------------------------- Holger Kruse ! "Those aren't bugs, just anomalies !" -----------------------------+-------+------------------------------ Zwijndrechtring 50, 2000 Norderstedt ! INTER: hkr@mcshh.hanse.de Germany Phone: +49 40 5261288 ! FIDO: Holger Kruse @ 2:249/8 -------------------------------------+------------------------------