Xref: utzoo comp.unix.xenix.sco:510 comp.unix.misc:357 comp.unix.sysv386:1298 comp.unix.internals:684 comp.unix.questions:26280 Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!samsung!zaphod.mps.ohio-state.edu!swrinde!ucsd!orion.oac.uci.edu!cedman From: cedman@lynx.ps.uci.edu (Carl Edman) Newsgroups: comp.unix.xenix.sco,comp.unix.misc,comp.unix.sysv386,comp.unix.internals,comp.unix.questions Subject: Re: Summary of Request for Comparison of Altos and NCR Message-ID: Date: 17 Oct 90 15:26:58 GMT References: <11@ACT.UUCP> Organization: non serviam Lines: 19 Nntp-Posting-Host: lynx.ps.uci.edu In-reply-to: peter@ficc.ferranti.com's message of 17 Oct 90 01:49:34 GMT In article peter@ficc.ferranti.com (Peter da Silva) writes: RISC versus CISC aside, using the term "crud" to refer to the 680x0 by comparison with the 80x86 makes me wonder about someone's sanity. Sure, the intel chips are currently on the high end of the see-saw: but wait till the 040 starts shipping in quantity. And what the compilers have to do to get that performance make RISC compilers seem simple. Just a short and (IMHO funny) note: Do you know how many instructions a RISC (Reduced Instruction Set Coding) CPU by IBM has ? 186 ! Yes, this is the number of the machine instructions for the new IBM 6000 series. Carl Edman Theorectial Physicist,N.:A physicist whose | Send mail existence is postulated, to make the numbers | to balance but who is never actually observed | cedman@golem.ps.uci.edu in the laboratory. | edmanc@uciph0.ps.uci.edu