Xref: utzoo comp.unix.xenix.sco:537 comp.unix.misc:370 comp.unix.sysv386:1350 comp.unix.internals:709 comp.unix.questions:26318 Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!samsung!dali.cs.montana.edu!uakari.primate.wisc.edu!sdd.hp.com!wuarchive!julius.cs.uiuc.edu!psuvax1!rutgers!cmcl2!phri!marob!cowan From: cowan@marob.masa.com (John Cowan) Newsgroups: comp.unix.xenix.sco,comp.unix.misc,comp.unix.sysv386,comp.unix.internals,comp.unix.questions Subject: Re: Summary of Request for Comparison of Altos and NCR Message-ID: <271DF47D.471D@marob.masa.com> Date: 18 Oct 90 18:29:16 GMT References: <18601@rpp386.cactus.org> Organization: The Logical Language Group, Inc. Lines: 21 In article <18601@rpp386.cactus.org>, jfh@rpp386.cactus.org (John F. Haugh II) writes: >In article , > cedman@lynx.ps.uci.edu (Carl Edman) writes: >>Just a short and (IMHO funny) note: Do you know how many instructions >>a RISC (Reduced Instruction Set Coding) CPU by IBM has ? 186 ! >>Yes, this is the number of the machine instructions for the new >>IBM 6000 series. > >the definition which seems to be in place at IBM regarding the >S/6000 is "reduced instruction set cycles". I actually asked about this point when IBM came out with the RT machine. The answer was: "The official IBM definition of RISC is 'Any IBM machine with fewer instructions than a System/360'". This comes about because all IBM RISC work began with the 809, an attempt to strip down the S/360 instruction set. -- cowan@marob.masa.com (aka ...!hombre!marob!cowan) e'osai ko sarji la lojban